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Impala Linear Corporation
ILC705/706/707/708
mP Supervisory Circuit
General Description The ILC705/ILC706/ILC707/ILC708 are low cost microprocessor supervisory circuits that monitor power supplies in microprocessor based systems. Circuit functions include a watchdog timer, microprocessor reset, power failure warning and a debounced manual reset input. The ILC705 and ILC706 offer a watchdog timer function while the ILC707 and ILC708 have an active high reset output in addition to the active low reset output. Supply voltage monitor levels of 4.65V and 4.4V are available. The ILC705/ILC707 have a nominal reset threshold level of 4.65V while the ILC706 and ILC708 have a 4.4V nominal reset threshold level. When the supply voltage drops below the respective reset threshold level, RESET is asserted.
Features
! 4.4V or 4.65V Precision Voltage Monitor ! 200ms Reset Pulse Width ! Debounced TTL/CMOS Compatible Manual Reset Input ! Watchdog Timer with 1.6 sec Timeout (ILC705/ILC706) ! Voltage Monitor for Early Power Fail Warning or Low
Battery Detect
! 8-Pin SOIC or DIP Package
Applications
! Computers ! Controllers ! Critical Microprocessor Power Monitoring ! Intelligent Instruments ! Portable Equipment
! Controllers
Pin Package Configuration
Typical Circuit
Top View
Manual Reset
MR 1 8 7 6 5
+5 V (Regulated)
WDO RESET WDI PFO
VCC
MR RESET
VCC
RESET
VCC 2 GND 3 PFI 4
ILC705 ILC706
DC Voltage (Unregulated) PFI
ILC705 ILC706
WDI WDO GND PFO I/O Line NMI
P
Interrupt
MR
1
8 7 6 5
RESET RESET NC PFO
VCC 2 GND 3 PFI
4
ILC707 ILC708
Ordering Information
Part ILC70_N ILC70_M Package 8-Lead PDIP 8-Lead SOIC Temp. Range -40C to +85C -40C to +85C
N Package - 8 Lead Plastic DIP Package M Package - 8 Lead Plastic SOIC Package
Impala Linear Corporation
ILC705-708 1.0
(408) 574-3939
www.impalalinear.com
Sept 1999
1
mP Supervisory Circuit
Absolute Maximum Ratings
Parameter Terminal Voltage Input Current Output Current Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec.) Power Dissipation Symbol VCC All other inputs VCC, GND All outputs TA Ratings -0.3 to 6.0 -0.3 to (VCC + 0.3) 25 20 -40 to +85 -65 to +150 300 475 400 Units V V mA mA C C C mW mW
PDIP SOIC
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. Operating ranges define those limits between which the functionality of the device is guaranteed.
Electrical Characterisitcs
VCC = 4.75 V to 5.5 V for ILC705/ILC707, VCC = 4.5 V to 5.5 V for ILC706/ILC708, TA = Operating Temperature Range, unless otherwise noted. Parameter Conditions Min Typ Max Units Operating Voltage Range, VCC ILC70__ 1.4 5.5 V Supply Current, ICC ILC70__ 60 A Reset Voltage Threshold Reset Threshold Hysteresis Reset Pulse Width, tRS RESET Output Voltage ILC705, ILC707 ILC706, ILC708 4.5 4.25 140 VCC - 1.5V 4.65 4.4 40 200 4.75 4.5 280 0.4 0.3 VCC - 1.5V 1.0 50 3.5 -150 VCC - 1.5V 100 150 VIL VIH VCC = 5V ISINK = 3.2mA VCC = 5V, ISOURCE = 800 A 0.8 2.0 1.2 -25 VCC - 1.5V 1.25 0.01 250 1.3 25 0.4 ns V nA V 250 0.4 600 1.6 0.4 2.25 V sec ns V A 150 V A ns V V mV ms V
RESET Output Voltage Watchdog Timeout Period, tWD WDI Minimum Input Pulse, tWP WDI Threshold Voltage WDI Input Current WDO Output Voltage MR Pull-Up Current MR Pulse Width, tMR MR Input Threshold MR to Reset Output Delay, tMD PFI Input Threshold PFI Input Current PFO Output Voltage
ISOURCE = 800 A ISINK = 3.2 mA ISINK = 50 A, VCC = 1.4V ISOURCE = 800 A ISINK = 1.2 mA VIL = 0.4V, VIH = 80% of VCC VIH, VCC = 5V VIL, VCC = 5V WDI = 0V WDI = VCC ISOURCE 800 A ISINK = 1.2 mA MR = 0V
0.8 -50 50
Impala Linear Corporation
ILC705-708 1.0
(408) 574-3939
www.impalalinear.com
Sept 1999
2
mP Supervisory Circuit
Pin Functions
Pin Number Pin Name MR ILC705 ILC706 1 ILC707 ILC708 1 Manual reset input. MR forces RESET to assert when pulled below 0.8V. An internal pull-up current of 250 mA on this input forces it high when left floating. This input can also be driven from TTL or CMOS logic. Power supply input, 5V. Ground pin, 0 V reference. Power fail input. Internally connected to the power fail comparator, which is referenced to 1.25V. The power fail output (PFO) remains high if PFI is above 1.25V. PFI should be connected to GND or VOUT if the power fail comparator is not used. Power fail output. The power fail comparator is independent of all other functions on this device. Watchdog input. The WDI input monitors microprocessor activity, an internal watchdog timer resets itself with each transition on the watchdog input. If the WDI pin is held high or low for longer than the watchdog timeout period, WDO is forced to active low. The watchdog function can be disabled by floating the WDI pin. No Connect. RESET output. RESET is asserted if either VCC goes below the reset threshold or by a low signal on the manual reset input (MR). RESET remains asserted for one reset timeout period (200ms) after VCC exceeds the reset threshold or after the manual reset pin transitions from low to high. The watchdog timer will not assert RESET unless WDO is connected to MR. Watchdog timer output. The watchdog timer resets itself with each transition on the watchdog input. If the WDI pin is held high or low for longer than the watchdog timeout period, WDO is forced low. WDO will also be forced low if VCC is below the reset threshold and will remain low until VCC returns to a valid level. RESET output. RESET is the compliment of RESET and is asserted if either VCC goes below the reset threshold or by a low signal on the manual reset input (MR). RESET is suitable for microprocessors systems that use an active high reset. Description
Vcc GND PFI
2 3 4
2 3 4
PFO WDI
5 6
5 N/A
N/C RESET
N/A 7
6 7
WDO
8
N/A
RESET
N/A
8
Impala Linear Corporation
ILC705-708 1.0
(408) 574-3939
www.impalalinear.com
Sept 1999
3
mP Supervisory Circuit
Circuit Description
Microprocessor Reset The RESET pin is asserted whenever VCC falls below the reset threshold voltage or when MR goes low. The reset pin remains asserted for a period of 200ms after VCC has risen above the reset threshold voltage and MR goes high. The reset function ensures the microprocessor is properly reset and powers up into a known condition after a power failure. RESET will remain valid with VCC as low as 1.4V fail comparator (PFI) can be chosen so as to trip the power fail comparator a few milliseconds before VCC falls below the maximum reset threshold voltage. The output of the power fail comparator (PFO) can be used to interrupt the microprocessor when used in this mode and execute shutdown procedures prior to power loss
Unregulated DC
VCC tMR MR tMD RESET tRS
VRT
R1
PFI
R2
4
1.25 V
+ -
5
PFO
tRS
WDO
Alternate Reference Guide
Watchdog Timer The microprocessor can be monitored by connecting the WDI pin (watchdog input) to a bus line or I/O line. If a transition does not occur on the WDI pin within the watchdog timeout period, then WDO will go low. A minimum pulse of 50ns or any transition low-to-high or high-to-low on the WDI pin will reset the watchdog timer. The output of the watchdog timer (WDO) will remain high if WDI sees a valid transition within the watchdog timeout period or if WDI is left floating. If VCC falls below the reset threshold voltage then WDO goes low immediately regardless of WDI. If WDI is left floating, then WDO can be used as a low line indicator. Manual Reset The manual-reset input (MR) allows reset to be triggered by a pushbutton switch which is debounced by the 140ms minimum reset pulse width. MR can be driven by external TTL/CMOS compatible logic. By connecting WDO to MR a watchdog timeout will generate a reset pulse in the ILC705/ILC706. Power Fail Warning An additional comparator which is independent of other functions on the ILC705/706/707/708 is provided for early warning of power failure. An external voltage divider can be used to compare unregulated DC to an internal 1.25V reference. The voltage divider ratio on the input of the power
Industry P/N MAX705CPA MAX705CSA MAX705EPA MAX705ESA ADM705AN DS1705 MAX706CPA MAX706CSA MAX706EPA MAX706C/D ADM706AN DS1706 MAX707CPA MAX707CSA MAX707EPA MAX707ESA MAX707C/D ADM707AN DS1707 MAX708CPA MAX708CSA MAX708EPA MAX708ESA MAX708C/D ADM708AN DS1708 ILC Direct Replacement ILC705N ILC705M ILC705N ILC705M ILC705N ILC705 ILC706N ILC706M ILC706N ILC706D ILC706N ILC706 ILC707N ILC707M ILC707N ILC707M ILC707D ILC707N ILC707 ILC708N ILC708M ILC708N ILC708M ILC708D ILC708N ILC708
Impala Linear Corporation
ILC705-708 1.0
(408) 574-3939
www.impalalinear.com
Sept 1999
4
mP Supervisory Circuit Packaging Information
0.197 0.190
M Package, 8-Pin Small Outline
Pin 1 identifier
0.155 0.150
0.244 0.228
0.069 0.053 0.060 0.040 0.019 0.013
0.012 0.009
0.8
0.011 0.004
0.050 0.016
0.019 0.013
N Package, 8-Pin Plastic Dual In-line
0.260 0.240
0.260 0.240 0.260 0.240 0.260 0.240 0.260 0.240
0.260 0.240
0.260 0.240 0.260 0.240
Devices sold by Impala Linear Corporation are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Impala Linear Corporation makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Impala Linear Corporation makes no warranty of merchantability or fitness for any purpose. Impala Linear Corporation reserves the right to discontinue production and change specifications and prices at any time and without notice. This product is intended for use in normal commercial applications. Applications requiring an extended temperature range, unusual environmental requirements, or high reliability applications, such as military and aerospace, are specifically not recommended without additional processing by Impala Linear Corporation. Impala Linear Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Impala Linear Corporation product. No other circuits, patents, licenses are implied.
Life Support Policy Impala Linear Corporation's products are not authorized for use as critical components in life support devices or systems. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labelling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonbly expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Impala Linear Corporation
ILC705-708 1.0
(408) 574-3939
www.impalalinear.com
Sept 1999
5

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